1. Field of the Invention
Embodiments of the invention relate to multilevel converter circuits.
2. Related Art
FIG. 23 shows one phase's worth of seven-level converter circuit disclosed in, for example, Japanese Patent Application No. JP-A-11-164567 (also referred to herein as “PTL 1”).
A series circuit of semiconductor switches Q1 to Q12 is connected between the positive terminal and negative terminal of a direct current combined power source BA2 wherein direct current single power sources b11 to b23 are connected in series, and the connecting point of the semiconductor switches Q6 and Q7, of the semiconductor switches Q1 to Q12, forms an alternating current output point U. Also, the outer side terminals of a diode pair DA1 formed of diodes D1 and D2 are connected between the connecting point of the semiconductor switches Q1 and Q2 and the connecting point of Q7 and Q8, and the midpoint terminal of the diode pair DA1 is connected to the connecting point of the direct current single power sources b11 and b12.
In the same way, the outer side terminals of a diode pair DA2 formed of diodes D3 and D4 are connected between the connecting point of the semiconductor switches Q2 and Q3 and the connecting point of Q8 and Q9, and the midpoint terminal of the diode pair DA2 is connected to the connecting point of the direct current single power sources b12 and b13, while the outer side terminals of a diode pair DA3 formed of diodes D5 and D6 are connected between the connecting point of the semiconductor switches Q3 and Q4 and the connecting point of Q9 and Q10, and the midpoint terminal of the diode pair DA3 is connected to the connecting point of the direct current single power sources b13 and b21. In the same way, the outer side terminals of a diode pair DA4 formed of diodes D7 and D8 are connected between the connecting point of the semiconductor switches Q4 and Q5 and the connecting point of Q10 and Q11, and the midpoint terminal of the diode pair DA4 is connected to the connecting point of the direct current single power sources b21 and b22, while the outer side terminals of a diode pair DA5 formed of diodes D9 and D10 are connected between the connecting point of the semiconductor switches Q5 and Q6 and the connecting point of Q11 and Q12, and the midpoint terminal of the diode pair DA5 is connected to the connecting point of the direct current single power sources b22 and b23.
In this kind of configuration, when the semiconductor switches Q1 to Q6 are turned on, and Q7 to Q12 are turned off, a voltage of +3E is output to the alternating current output terminal U,
when the semiconductor switches Q2 to Q7 are turned on, and Q8 to Q12 and Q1 are turned off, a voltage of +2E is output to the alternating current output terminal U,
when the semiconductor switches Q3 to Q8 are turned on, and Q9 to Q12, Q1, and Q2 are turned off, a voltage of +1E is output to the alternating current output terminal U,
when the semiconductor switches Q4 to Q9 are turned on, and Q1 to Q3 and Q10 to Q12 are turned off, zero voltage is output to the alternating current output terminal U,
when the semiconductor switches Q5 to Q10 are turned on, and Q11, Q12, and Q1 to Q4 are turned off, a voltage of −1E is output to the alternating current output terminal U,
when the semiconductor switches Q6 to Q11 are turned on, and Q12 and Q1 to Q5 are turned off, a voltage of −2E is output to the alternating current output terminal U, and
when the semiconductor switches Q7 to Q12 are turned on, and Q1 to Q6 are turned off, a voltage of −3E is output to the alternating current output terminal U.
By adjusting on and off of each semiconductor switch Q1 to Q12 as above, it is possible to output mutually different seven levels of voltages to the alternating current output terminal U.
FIG. 24 shows one phase's worth of nine-level converter circuit.
The converter circuit of FIG. 24 has nine levels extended from the seven levels of FIG. 23, and as the circuit configuration and operation are basically the same as those shown in FIG. 23, a description will be omitted. That is, by setting the voltage levels of three terminals of the direct current power source to 4E, 0, and −4E, and adjusting on and off of each semiconductor switch Q1 to Q16, it is possible to output mutually different nine levels of voltages to an alternating current output terminal U.
With the circuits of FIGS. 23 and 24, the number of semiconductor switches through which output current passes is a maximum of six in series or a maximum of eight in series between the direct current combined power source BA2 of each circuit and the alternating current output point U. Because of this, steady on loss in the semiconductor switches increases, thus causing a decrease in the efficiency of the whole of the device, and leading to a difficulty in miniaturization and price reduction.
Also, in such a general multilevel converter circuit as in FIGS. 23 and 24, as powers divided between direct current single power sources b11 to b14 and b21 to b24 are not the same in principle even when voltage and current output from the alternating current output point U have an alternating current waveform with symmetric positive and negative amplitudes, direct current single power sources independent of one another are necessary. Because of this, as six or eight single power sources which can supply powers independently are necessary for the direct current combined power source BA2 which is an input, this brings about a big restriction on manufacturing the device. This direct current power source imbalance problem is introduced in, for example, “A multi-level voltage-source converter system with balanced DC voltage” on pp 1144 to 1150 in the conference record of IEEE-PESC '95.
Therefore, a problem of the invention is to eliminate an operational restriction by reducing the number of semiconductor switches through which output current passes, thus achieving loss reduction, and by enabling an operation using two single power sources as a direct current input power source.